Some of the tools that Synopsys released on Wednesday are catching up to those made by Cadence. Synopsys is racing its biggest competitor, Cadence Design Systems, to add AI to chip design software first. No one wants to be surprised if someone tells them they can’t use Chinese or Taiwanese “Ghazi said. “Every CEO was looking for a different way to do things. is causing chip executives to look for more options. Sassine Ghazi, president and chief operating officer of Synopsys, said that a tight chip supply chain and restrictions on doing business in the U.S. Usually, these kinds of moves are expensive and take a long time. Synopsys also released a tool on Wednesday that makes it easier to move designs for analog chips from one manufacturing partner to another. They are meant to help engineers find bugs in their designs, test sample chips from manufacturing partners, and, once mass production has started, increase the number of chips that are free of bugs. These AI tools cover a significantly larger portion of the process. The tools Synopsys released on Wednesday at its annual user conference in Santa Clara, California cover the chip design process. and ST Microelectronics are among the companies that use the system. Three years ago, Synopsys released an AI tool for one part of the chip design process. How To Start A Blog In 2022 Best Guide To Set Up Your Blog
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